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WILSONVILLE, Ore.--(BUSINESS WIRE)--March 12, 2001-- Mentor Graphics Corp. (Nasdaq:MENT) today introduced the HDL Designer Series(TM), a new family of point tools for complex Verilog, VHDL or mixed-language design.

HDL Designer Series products cover all aspects of the design entry and management process: HDL Pilot(TM) for design management; HDL Detective(TM) for design analysis; HDL Author(TM) for text and graphical editing and documentation; and HDL Designer(TM) for complete point tool functionality in a single solution. Combining best-in-class technologies of the Mentor Graphics® Renoir® HDL graphical entry tool with technology recently acquired from Escalade, HDL Designer Series is the EDA industry's most complete tool suite for HDL design, analysis and management.

``HDL Designer Series opens up new markets for Mentor Graphics in HDL Design,'' said Dr. Walden C. Rhines, chairman and chief executive officer for Mentor Graphics. ``HDL designers working on ASIC/FPGA systems-on-chip (SoC) now have the industry's most flexible and easy-to-use tool set for design entry, management and visualization, whether using individual point tools or a complete design flow.''

HDL Designer Series offers a design staff unmatched flexibility, accommodating a team member's design preference, whether it's working with HDL source code, common graphical representations, or any combination of the two, without compromising the ability to monitor and manage data in a common environment. Extensive Intellectual Property (IP) reuse and multiple site design teams drive the need for a standard design environment. Teams can choose to standardize on individual tools from the HDL Designer Series family, or get the most flexibility from HDL Designer, which offers all of the features found in HDL Pilot, HDL Detective and HDL Author in one comprehensive package. This enables full leverage of existing IP, accelerated time-to-market and reduced development costs company-wide.

``Solo engineers, worldwide teams, text experts and novice HDL designers may be divided by design methodology, but they are united by a common goal -- productivity,'' said Valerie Rachko, marketing manager for HDL Designer Series. ``Our new HDL Designer Series tool suite accommodates virtually any style of HDL design, so all designers now have access to our best-in-class technology.''

HDL Pilot - The Manager

One of the most challenging aspects of design management is ensuring that designs can be consistently and efficiently reused throughout an organization. HDL Pilot provides a common cockpit from which all design data can be managed, making it easy to transfer design data within a common reuse environment. Its easy-to-use interface allows designers to navigate through and manage project data generated in complex Verilog, VHDL and mixed-language designs processes. HDL Pilot eliminates the cost of developing and maintaining a homegrown design environment and frees design staffs from creating and maintaining scripts, dramatically improving the cost/performance ratio for each engineer on a team.

HDL Detective - The Analyzer

Current design reuse methodologies are not being maximized, with teams wasting valuable time trying to locate hundreds of HDL files necessary to understand the design structure of a reusable block. HDL Detective simplifies documentation creation and maintenance at every step of the FPGA, ASIC and SoC design cycle, featuring a push-button process for reusing legacy or commercial IP designs. Designers can use HDL Detective to visualize the current state of a design and automatically generate documentation for newly developed HDL. This process translates HDL to diagrammatic representations, making it easy for engineers to understand HDL from a foreign source.

HDL Author - The Creator

HDL Author allows design teams to create complex systems with consistent design quality and style. To accommodate the fullest range of design preferences, HDL Author is available in three flavors for designers using pure HDL source code, graphical representations, or a combination of both.

        A challenge for designers is how to rapidly describe the
        interfaces for new blocks of functionality and to interconnect
        reusable IP blocks. With large designs, it is very difficult
        to visualize and document a piece of interconnect code buried
        in thousands of lines of HDL. HDL Author Text features
        Interface Based Design(TM) (IBD(TM)) to solve the interconnect
        creation problem. IBD is a new, patent-pending concept in
        text-based entry that simplifies interconnect creation
        problems by displaying design interconnect structures in an
        easy-to-view and compact tabular format. This tabular editing
        environment allows designers to capture a given level of
        hierarchy piece by piece, simplifying the creation and
        documentation process.

     Mentor Graphics
     Amy Malagamba, 503/685-7836
     amy_malagamba@mentor.com
     or
     Benjamin Group/BSMG Worldwide
     Jeremiah Glodoveza, 415/352-2628 ext. 559
     jeremiah@benjamingroup.com